sueden.social

IT NewsCommodore 64 on New FPGA - When it comes to getting retro hardware running again, there are many approaches. ... - <a href="https://hackaday.com/2025/07/28/commodore-64-on-new-fpga/" rel="nofollow noopener" translate="no" target="_blank">https://hackaday.com/2025/07/28/commodore-64-on-new-fpga/</a> <a href="https://schleuss.online/tags/retrocomputing" class="mention hashtag" rel="nofollow noopener" target="_blank">#retrocomputing</a> <a href="https://schleuss.online/tags/commodore64" class="mention hashtag" rel="nofollow noopener" target="_blank">#commodore64</a> <a href="https://schleuss.online/tags/tangnano9k" class="mention hashtag" rel="nofollow noopener" target="_blank">#tangnano9k</a> <a href="https://schleuss.online/tags/verilog" class="mention hashtag" rel="nofollow noopener" target="_blank">#verilog</a> <a href="https://schleuss.online/tags/vic" class="mention hashtag" rel="nofollow noopener" target="_blank">#vic</a>-ii <a href="https://schleuss.online/tags/fpga" class="mention hashtag" rel="nofollow noopener" target="_blank">#fpga</a> <a href="https://schleuss.online/tags/hdmi" class="mention hashtag" rel="nofollow noopener" target="_blank">#hdmi</a> <a href="https://schleuss.online/tags/vhdl" class="mention hashtag" rel="nofollow noopener" target="_blank">#vhdl</a>

FLF<a href="https://mastodon.social/@thezoq2" class="u-url mention" rel="nofollow noopener" target="_blank">@thezoq2</a> Begin page 392 in pdf.<a href="https://piaille.fr/tags/fpga" class="mention hashtag" rel="nofollow noopener" target="_blank">#fpga</a> <a href="https://piaille.fr/tags/surfer" class="mention hashtag" rel="nofollow noopener" target="_blank">#surfer</a> <a href="https://piaille.fr/tags/verilog" class="mention hashtag" rel="nofollow noopener" target="_blank">#verilog</a> <a href="https://piaille.fr/tags/vhdl" class="mention hashtag" rel="nofollow noopener" target="_blank">#vhdl</a> <a href="https://piaille.fr/tags/spinalHDL" class="mention hashtag" rel="nofollow noopener" target="_blank">#spinalHDL</a> <a href="https://piaille.fr/tags/chisel" class="mention hashtag" rel="nofollow noopener" target="_blank">#chisel</a> <a href="https://piaille.fr/tags/icarus" class="mention hashtag" rel="nofollow noopener" target="_blank">#icarus</a> <a href="https://piaille.fr/tags/verilator" class="mention hashtag" rel="nofollow noopener" target="_blank">#verilator</a> <a href="https://piaille.fr/tags/simulation" class="mention hashtag" rel="nofollow noopener" target="_blank">#simulation</a> <a href="https://piaille.fr/tags/opensource" class="mention hashtag" rel="nofollow noopener" target="_blank">#opensource</a> <a href="https://piaille.fr/tags/gtkwave" class="mention hashtag" rel="nofollow noopener" target="_blank">#gtkwave</a> <a href="https://piaille.fr/tags/waveform" class="mention hashtag" rel="nofollow noopener" target="_blank">#waveform</a>

Markus Osterhoff<a href="https://mastodon.social/@raiderrobert" class="u-url mention" rel="nofollow noopener" target="_blank">@raiderrobert</a> <a href="https://troet.cafe/tags/Verilog" class="mention hashtag" rel="nofollow noopener" target="_blank">#Verilog</a>, <a href="https://troet.cafe/tags/C" class="mention hashtag" rel="nofollow noopener" target="_blank">#C</a>, PHP, bash, Python, HTML+CSS+JS, <a href="https://troet.cafe/tags/TeXLaTeX" class="mention hashtag" rel="nofollow noopener" target="_blank">#TeXLaTeX</a>, …

e_esiceprog blinky.bin init.. cdone: high reset.. cdone: low flash ID: 0x20 0xBA 0x16 0x10 0x00 0x00 0x23 0x80 0x80 0x52 0x17 0x00 0x92 0x00 0x30 0x09 0x05 0x18 0xBC 0xBD file size: 32220 erase 64kB sector at 0x000000.. programming.. done. reading.. VERIFY OK cdone: high Bye.<a href="https://chaos.social/tags/Opensource" class="mention hashtag" rel="nofollow noopener" target="_blank">#Opensource</a> <a href="https://chaos.social/tags/fpga" class="mention hashtag" rel="nofollow noopener" target="_blank">#fpga</a> <a href="https://chaos.social/tags/vhdl" class="mention hashtag" rel="nofollow noopener" target="_blank">#vhdl</a> <a href="https://chaos.social/tags/verilog" class="mention hashtag" rel="nofollow noopener" target="_blank">#verilog</a>

e_esthe first example was to old, the <a href="https://chaos.social/tags/yosys" class="mention hashtag" rel="nofollow noopener" target="_blank">#yosys</a> Software changed the last years. But now I get an example to work. Nearly everything worked out of the box. After adding a udev/rules.d even programming worked!!! <a href="https://chaos.social/tags/Yeah" class="mention hashtag" rel="nofollow noopener" target="_blank">#Yeah</a> <a href="https://chaos.social/tags/Opensource" class="mention hashtag" rel="nofollow noopener" target="_blank">#Opensource</a> <a href="https://chaos.social/tags/fpga" class="mention hashtag" rel="nofollow noopener" target="_blank">#fpga</a> <a href="https://chaos.social/tags/vhdl" class="mention hashtag" rel="nofollow noopener" target="_blank">#vhdl</a> <a href="https://chaos.social/tags/verilog" class="mention hashtag" rel="nofollow noopener" target="_blank">#verilog</a>

poleguy looking for lost toolsJust pushed some updates. I have posted the <a href="https://mastodon.social/tags/verilog" class="mention hashtag" rel="nofollow noopener" target="_blank">#verilog</a> serial link code. This involved getting a set of scripts for simulation set up.If anybody is interested in helping on this project, I'd love to have somebody try to follow the readme.md to install the prerequisites and run the ./run_sim script.The goal would be to take notes and flesh out what things aren't in the prerequisite list and how to install them.I'd be happy to do the same for somebody else's project.<a href="https://mastodon.social/tags/fpga" class="mention hashtag" rel="nofollow noopener" target="_blank">#fpga</a> <a href="https://mastodon.social/tags/reproducibility" class="mention hashtag" rel="nofollow noopener" target="_blank">#reproducibility</a>

poleguy looking for lost toolsDear <a href="https://mastodon.social/tags/lazymastodon" class="mention hashtag" rel="nofollow noopener" target="_blank">#lazymastodon</a>: I'm trying to move an <a href="https://mastodon.social/tags/FPGA" class="mention hashtag" rel="nofollow noopener" target="_blank">#FPGA</a> simulation from Rivera-PRO to Tachyon cvc64 in <a href="https://mastodon.social/tags/verilog" class="mention hashtag" rel="nofollow noopener" target="_blank">#verilog</a> I have a design with four "top levels" and cvc seems to chose the first one in the compile order. I would like to specify one explicitly.I'm using the open version of the tool, so don't have paid support. Documentation for this tool is... hard to find?Can someone recommend a better tool? Or just show me where I missed in the documentation how to set the top?<a href="http://www.tachyon-da.com/home/how-to-purchase-cvc-enterprise-support/" rel="nofollow noopener" translate="no" target="_blank">http://www.tachyon-da.com/home/how-to-purchase-cvc-enterprise-support/</a>

Hacker NewsOpenSERDES – Open Hardware Serializer/Deserializer (SerDes) in Verilog<a href="https://github.com/SparcLab/OpenSERDES" rel="nofollow noopener" translate="no" target="_blank">https://github.com/SparcLab/OpenSERDES</a><a href="https://mastodon.social/tags/HackerNews" class="mention hashtag" rel="nofollow noopener" target="_blank">#HackerNews</a> <a href="https://mastodon.social/tags/OpenSERDES" class="mention hashtag" rel="nofollow noopener" target="_blank">#OpenSERDES</a> <a href="https://mastodon.social/tags/OpenHardware" class="mention hashtag" rel="nofollow noopener" target="_blank">#OpenHardware</a> <a href="https://mastodon.social/tags/Verilog" class="mention hashtag" rel="nofollow noopener" target="_blank">#Verilog</a> <a href="https://mastodon.social/tags/SerDes" class="mention hashtag" rel="nofollow noopener" target="_blank">#SerDes</a> <a href="https://mastodon.social/tags/GitHub" class="mention hashtag" rel="nofollow noopener" target="_blank">#GitHub</a>

Cyber-Fox 🏴‍☠️🐙For a school project, I need to choose between 2 Verilog simulator: Verilator or Iverilog.But I don't know which one to choose.Any advice ?<a href="https://framapiaf.org/tags/FPGA" class="mention hashtag" rel="nofollow noopener" target="_blank">#FPGA</a> <a href="https://framapiaf.org/tags/Verilog" class="mention hashtag" rel="nofollow noopener" target="_blank">#Verilog</a>

francesco 🍥Cooked up this abomination at ZuriHac 2025 -- execute Verilog circuits right from your Haskell! All the blame for the idea goes to <a href="https://mastodon.social/@kmett" class="u-url mention" rel="nofollow noopener" target="_blank">@kmett</a> <a href="https://mazzo.li/posts/inline-verilog.html" rel="nofollow noopener" translate="no" target="_blank">https://mazzo.li/posts/inline-verilog.html</a><a href="https://mastodon.social/tags/haskell" class="mention hashtag" rel="nofollow noopener" target="_blank">#haskell</a> <a href="https://mastodon.social/tags/verilog" class="mention hashtag" rel="nofollow noopener" target="_blank">#verilog</a>

Topaz 🐇OK this is pretty cool. A project called DigitalJS can give you a visual layout of all of the logic that'll go into a Verilog design, using Yosys to do the generation. Being able to see what's being ultimately produced helps me, a much more visual person, understand when I've flubbed something that generates too much logic. I already optimized one piece of the display RAM using it. It's at <a href="https://digitaljs.tilk.eu/" rel="nofollow noopener" translate="no" target="_blank">https://digitaljs.tilk.eu/</a> but you can also run it locally. <a href="https://oldbytes.space/tags/fpga" class="mention hashtag" rel="nofollow noopener" target="_blank">#fpga</a> <a href="https://oldbytes.space/tags/verilog" class="mention hashtag" rel="nofollow noopener" target="_blank">#verilog</a> <a href="https://oldbytes.space/tags/ulx3s" class="mention hashtag" rel="nofollow noopener" target="_blank">#ulx3s</a>

Didier's Live StreamI've gone live!<a class="hashtag" href="https://directory.owncast.online/tags/owncast" rel="nofollow noopener" target="_blank">#owncast</a> <a class="hashtag" href="https://directory.owncast.online/tags/streaming" rel="nofollow noopener" target="_blank">#streaming</a> <a class="hashtag" href="https://directory.owncast.online/tags/amiga" rel="nofollow noopener" target="_blank">#amiga</a> <a class="hashtag" href="https://directory.owncast.online/tags/LiveCoding" rel="nofollow noopener" target="_blank">#LiveCoding</a> <a class="hashtag" href="https://directory.owncast.online/tags/RetroGaming" rel="nofollow noopener" target="_blank">#RetroGaming</a> <a class="hashtag" href="https://directory.owncast.online/tags/RetroComputing" rel="nofollow noopener" target="_blank">#RetroComputing</a> <a class="hashtag" href="https://directory.owncast.online/tags/GameDev" rel="nofollow noopener" target="_blank">#GameDev</a> <a class="hashtag" href="https://directory.owncast.online/tags/IndieDev" rel="nofollow noopener" target="_blank">#IndieDev</a> <a class="hashtag" href="https://directory.owncast.online/tags/DJ" rel="nofollow noopener" target="_blank">#DJ</a> <a class="hashtag" href="https://directory.owncast.online/tags/DJSet" rel="nofollow noopener" target="_blank">#DJSet</a> <a class="hashtag" href="https://directory.owncast.online/tags/HouseMusic" rel="nofollow noopener" target="_blank">#HouseMusic</a> <a class="hashtag" href="https://directory.owncast.online/tags/AnaloguePocket" rel="nofollow noopener" target="_blank">#AnaloguePocket</a> <a class="hashtag" href="https://directory.owncast.online/tags/Verilog" rel="nofollow noopener" target="_blank">#Verilog</a> <a class="hashtag" href="https://directory.owncast.online/tags/FPGA" rel="nofollow noopener" target="_blank">#FPGA</a><a href="https://live.malenfant.net" rel="nofollow noopener" target="_blank">https://live.malenfant.net</a>

bleeptrackIf you wanna see me struggle with <a href="https://vis.social/tags/shaders" class="mention hashtag" rel="nofollow noopener" target="_blank">#shaders</a> and <a href="https://vis.social/tags/verilog" class="mention hashtag" rel="nofollow noopener" target="_blank">#verilog</a> at the same time: I have a stream for you this evening!<a href="https://www.youtube.com/live/HSV3xF_TSqg?si=YmyPzEyXG5p8ryU1" rel="nofollow noopener" translate="no" target="_blank">https://www.youtube.com/live/HSV3xF_TSqg?si=YmyPzEyXG5p8ryU1</a>

IT NewsThe Spade Hardware Description Language - Spade is an open-source hardware description language (HDL) developed at Linköping... - <a href="https://hackaday.com/2025/04/13/the-spade-hardware-description-language/" rel="nofollow noopener" translate="no" target="_blank">https://hackaday.com/2025/04/13/the-spade-hardware-description-language/</a> <a href="https://schleuss.online/tags/hardwaredescriptionlanguage" class="mention hashtag" rel="nofollow noopener" target="_blank">#hardwaredescriptionlanguage</a> <a href="https://schleuss.online/tags/spadelanguage" class="mention hashtag" rel="nofollow noopener" target="_blank">#spadelanguage</a> <a href="https://schleuss.online/tags/hardware" class="mention hashtag" rel="nofollow noopener" target="_blank">#hardware</a> <a href="https://schleuss.online/tags/verilog" class="mention hashtag" rel="nofollow noopener" target="_blank">#verilog</a> <a href="https://schleuss.online/tags/fpga" class="mention hashtag" rel="nofollow noopener" target="_blank">#fpga</a> <a href="https://schleuss.online/tags/asic" class="mention hashtag" rel="nofollow noopener" target="_blank">#asic</a> <a href="https://schleuss.online/tags/vhdl" class="mention hashtag" rel="nofollow noopener" target="_blank">#vhdl</a> <a href="https://schleuss.online/tags/hdl" class="mention hashtag" rel="nofollow noopener" target="_blank">#hdl</a>

Philip Zucker[New Blog Post] Comparing Two Verilog CPU Implementations using EBMC <a href="https://www.philipzucker.com/td4_ebmc/" rel="nofollow noopener" translate="no" target="_blank">https://www.philipzucker.com/td4_ebmc/</a> <a href="https://types.pl/tags/verilog" class="mention hashtag" rel="nofollow noopener" target="_blank">#verilog</a> <a href="https://types.pl/tags/formal" class="mention hashtag" rel="nofollow noopener" target="_blank">#formal</a>

JackHey all! I'm due for an (re-)introduction: I'm Jack, an engineer in the NYC area from a firmware & cybersecurity background, currently working in something like hardware-software co-design.Technical work is often with <a href="https://recurse.social/tags/rust" class="mention hashtag" rel="nofollow noopener" target="_blank">#rust</a> <a href="https://recurse.social/tags/kicad" class="mention hashtag" rel="nofollow noopener" target="_blank">#kicad</a> <a href="https://recurse.social/tags/python" class="mention hashtag" rel="nofollow noopener" target="_blank">#python</a> <a href="https://recurse.social/tags/verilog" class="mention hashtag" rel="nofollow noopener" target="_blank">#verilog</a> <a href="https://recurse.social/tags/c" class="mention hashtag" rel="nofollow noopener" target="_blank">#c</a>, and in all-too-rare moments stuff like <a href="https://recurse.social/tags/haskell" class="mention hashtag" rel="nofollow noopener" target="_blank">#haskell</a> <a href="https://recurse.social/tags/forth" class="mention hashtag" rel="nofollow noopener" target="_blank">#forth</a> <a href="https://recurse.social/tags/agda" class="mention hashtag" rel="nofollow noopener" target="_blank">#agda</a> and <a href="https://recurse.social/tags/prolog" class="mention hashtag" rel="nofollow noopener" target="_blank">#prolog</a> I've never been much for social media, usually preferring to keep interests local: a better-detailed <a href="https://recurse.social/tags/introduction" class="mention hashtag" rel="nofollow noopener" target="_blank">#introduction</a> to follow as I figure this out 🙂

PipelineCLearn PipelineC <a href="https://fosstodon.org/tags/HDL" class="mention hashtag" rel="nofollow noopener" target="_blank">#HDL</a> basics featuring the pico-ice dev board from tinyVision.ai! It has a Lattice Semiconductor @latticesemi <a href="https://fosstodon.org/tags/ice40" class="mention hashtag" rel="nofollow noopener" target="_blank">#ice40</a> <a href="https://fosstodon.org/tags/FPGA" class="mention hashtag" rel="nofollow noopener" target="_blank">#FPGA</a> and <a href="https://fosstodon.org/@Raspberrypi" class="u-url mention" rel="nofollow noopener" target="_blank">@Raspberrypi</a>. This intro covers <a href="https://fosstodon.org/tags/LED" class="mention hashtag" rel="nofollow noopener" target="_blank">#LED</a>, <a href="https://fosstodon.org/tags/UART" class="mention hashtag" rel="nofollow noopener" target="_blank">#UART</a>, and <a href="https://fosstodon.org/tags/VGA" class="mention hashtag" rel="nofollow noopener" target="_blank">#VGA</a> projects using OSS CAD Suite tools. <a href="https://fosstodon.org/tags/hardware" class="mention hashtag" rel="nofollow noopener" target="_blank">#hardware</a> <a href="https://fosstodon.org/tags/RTL" class="mention hashtag" rel="nofollow noopener" target="_blank">#RTL</a> <a href="https://fosstodon.org/tags/Verilog" class="mention hashtag" rel="nofollow noopener" target="_blank">#Verilog</a> <a href="https://fosstodon.org/tags/VHDL" class="mention hashtag" rel="nofollow noopener" target="_blank">#VHDL</a> <a href="https://fosstodon.org/tags/HLS" class="mention hashtag" rel="nofollow noopener" target="_blank">#HLS</a> <a href="https://www.youtube.com/watch?v=wWdvuAQXeS0" rel="nofollow noopener" translate="no" target="_blank">https://www.youtube.com/watch?v=wWdvuAQXeS0</a>

PipelineCCome learn some PipelineC <a href="https://fosstodon.org/tags/HDL" class="mention hashtag" rel="nofollow noopener" target="_blank">#HDL</a> basics featuring the pico-ice dev board from tinyVision.ai! It has a Lattice Semiconductor @latticesemi <a href="https://fosstodon.org/tags/ice40" class="mention hashtag" rel="nofollow noopener" target="_blank">#ice40</a> <a href="https://fosstodon.org/tags/FPGA" class="mention hashtag" rel="nofollow noopener" target="_blank">#FPGA</a> and <a href="https://fosstodon.org/@Raspberrypi" class="u-url mention" rel="nofollow noopener" target="_blank">@Raspberrypi</a>. This intro talk will cover <a href="https://fosstodon.org/tags/LED" class="mention hashtag" rel="nofollow noopener" target="_blank">#LED</a>, <a href="https://fosstodon.org/tags/UART" class="mention hashtag" rel="nofollow noopener" target="_blank">#UART</a>, and <a href="https://fosstodon.org/tags/VGA" class="mention hashtag" rel="nofollow noopener" target="_blank">#VGA</a> projects using OSS CAD Suite tools. <a href="https://fosstodon.org/tags/hardware" class="mention hashtag" rel="nofollow noopener" target="_blank">#hardware</a> <a href="https://fosstodon.org/tags/RTL" class="mention hashtag" rel="nofollow noopener" target="_blank">#RTL</a> <a href="https://fosstodon.org/tags/Verilog" class="mention hashtag" rel="nofollow noopener" target="_blank">#Verilog</a> <a href="https://fosstodon.org/tags/VHDL" class="mention hashtag" rel="nofollow noopener" target="_blank">#VHDL</a> <a href="https://fosstodon.org/tags/HLS" class="mention hashtag" rel="nofollow noopener" target="_blank">#HLS</a>

PipelineCGifted a new <a href="https://fosstodon.org/tags/FPGA" class="mention hashtag" rel="nofollow noopener" target="_blank">#FPGA</a> dev board this season? 🤓 PipelineC aims to make <a href="https://fosstodon.org/tags/hardware" class="mention hashtag" rel="nofollow noopener" target="_blank">#hardware</a> description easier for <a href="https://fosstodon.org/tags/embedded" class="mention hashtag" rel="nofollow noopener" target="_blank">#embedded</a> folks. Check out the new getting start page. Happy to help you get going! <a href="https://fosstodon.org/tags/hdl" class="mention hashtag" rel="nofollow noopener" target="_blank">#hdl</a> <a href="https://fosstodon.org/tags/verilog" class="mention hashtag" rel="nofollow noopener" target="_blank">#verilog</a> <a href="https://fosstodon.org/tags/vhdl" class="mention hashtag" rel="nofollow noopener" target="_blank">#vhdl</a> <a href="https://fosstodon.org/tags/hls" class="mention hashtag" rel="nofollow noopener" target="_blank">#hls</a> <a href="https://fosstodon.org/tags/HLS" class="mention hashtag" rel="nofollow noopener" target="_blank">#HLS</a> <a href="https://github.com/JulianKemmerer/PipelineC/wiki/Dev-Board-Setup" rel="nofollow noopener" translate="no" target="_blank">https://github.com/JulianKemmerer/PipelineC/wiki/Dev-Board-Setup</a>

iantoToday's <a href="https://toot.wales/tags/AdventOfCode" class="mention hashtag" rel="nofollow noopener" target="_blank">#AdventOfCode</a> part1 was again a surprisingly fast success (anonymous variables in <a href="https://toot.wales/tags/perl" class="mention hashtag" rel="nofollow noopener" target="_blank">#perl</a> ftw) in private leaderboard, but also weirdly easy which is _always_ a red flag for part2. I'll come back to that later, but meanwhile will make a hardware design for the number generator (<a href="https://toot.wales/tags/verilog" class="mention hashtag" rel="nofollow noopener" target="_blank">#verilog</a>), and will also have the 10yo learn how to solve it (<a href="https://toot.wales/tags/python" class="mention hashtag" rel="nofollow noopener" target="_blank">#python</a>). Thanks a lot to <a href="https://hachyderm.io/@ericwastl" class="u-url mention" rel="nofollow noopener" target="_blank">@ericwastl</a> for not ruining Sunday with a 3d falling grid problem!

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