remember Stellaris MCUs with this amazing errata? i love it so much https://www.ti.com/lit/er/spmz861/spmz861.pdf?ts=1740672431462
you should read the full 52 page document, it's very entertaining
it also has other errata, like "JTAG doesn't work" and "PWM doesn't work" and "timers don't work" and "ADCs don't work" and "we don't know how to do CDC" ... well you get the idea. read the full document!
their estimated attrition rate over 10 years is *one percent of all MCUs shipped* even if you keep them powered on so they can ECC themselves
this is bonkers
while the device is reset it configures pullups/pulldowns in a way that causes it to clock its own JTAG, and the workaround is to write some code that does this _on purpose_ to perform a TAP reset on every CPU reset
you can't make this up
"don't execute these particular accesses to SRAM, including if they are split across functions or interrupts. how? well uhhh... idk"
"sometimes our core will execute random parts of your code during reset. knock yourself out"
"watchdog cannot be cleared and resets the core even if not programmed to reset the core"
"don't close a switch too fast or you'll kill the entire supply pin"
this one is from a related errata document
"if you toggle a GPIO too quickly you can overheat it"
by the way, this is errata GPIO#10. only four out of ten are public :)
don't worry about it :) :)
"don't write the internal EEPROM more than 7 times per word"
but!
but!!!
i haven't shown you the best part yet
it's buried on page 1451 of a 1475 page datasheet
read every single footnote carefully
what they say (and partly, don't say) is: if you inject more than +2000, -500 microamps into most of its IO pads, the device gains an internal short to ground
the only way to avoid this is resistors on basically every pin
this happened because the ESD structures were too expensive to buy from TSMC and the startup Luminary Micro designed their own
@whitequark looks to me like the good old CMOS latchup from the parasitic PNPN structure is back alive